FMCW mmWave Radar:
• 58-64 GHz coverage with 6GHz sweep bandwidth
• 1 transmit Channel and 3 Receive Channels with AiP Package Antenna for 3D detection
• Integrated RFPLL, DPLL, Transmitter, Receiver, ADC and Baseband
• 17.0 dBm Max TX EIRP Output Power
• 10dB Typical NF per RX
• -95 dBc/Hz Typical Phase Noise at 1MHz
• 10/20MHz IF Bandwidth
• Up to 400MHz/us Ramp Rate
• HWA for 1D/2D FFT, Static Clutter Remove and CFAR Operations
2.4GHz Wireless Connectivity
• Protocols: Supports BLE 5.3, BLE Mesh, IEEE 802.15.4, Thread 1.3, Matter 1.1, and 2.4GHz proprietary
• Bluetooth LE PHY :1Mbps, 2Mbps, Long Range S2 (500Kbps), S8 (125Kbps)
• TX Max Output Power: 10dBm@BLE mode
• RX Sensitivity: -95dBm @BLE 1Mbps
Application System
• 32-bit RISC-V CPU with FPU (up to 128MHz) and I/D cache for Radar Post-processing, Wireless and Application.
• Security Engine: Secure Boot, Efuse Key Protection, SRAM and XIP Decryption on the fly, TRNG, AES128/SHA/RSA/ECC
Internal Memory
• On Chip 384KB SRAM
Power Management
• Single Power Supply from 1.7V to 5.5V
• Built-in LDO Network for Enhanced PSRR
• BOM-Optimized and Power-Optimized Modes
The RS6130 is a single chip 60GHz 1T3R FMCW AiP radar sensor with multi-protocol wireless connectivity (BLE5.3/802.15.4/Thread/Matter) inside. The device is portioned into four subsystems, shown in the figure below:
• mmWave Radar Subsystem: This block includes all high-performance radar RF/analog and baseband. It also includes the chirp generator and tx-to-rx finite state machine. HWA is included in baseband, used to offload specified radar processing such as 1D/2D FFT and CFAR.
• 2.4GHz Wireless Connectivity Subsystem: This block contains the whole 2.4G multi-protocol wireless RF, Mod/Demod, Baseband Protocol, and the data interacts with the application CPU via the internal data bus.
• Application Subsystem: It mainly includes one 32-bit RISC-V CPU with FPU and SRAM memory. The CPU connects to SRAM, peripheral interface, and other subsystems via AHB and APB buses. The RISC-V CPU is used to run radar post-processing algorithms, wireless protocols, and other system tasks.
• Power and Clock Subsystem: This chip is a complex single-chip SoC with multiple function systems. We use a single power and clock subsystem for centralized management. It includes several clock sources (including LSI, MSI, DCXO, and SPLL), power blocks (LDOs, BG, and Clamp), and a temperature sensor.
The RS6130 is specifically designed to feature the capability of ultra-low power radar sensing. It contains four main power modes for low power management: shutdown, standby, idle, and active. Our EFSENS™ ultra-low power technology enables the sensor to remain active for more than a year powered by a button battery. Its configuration and data acquisition are enabled via UART/SPI/I2C digital interfaces with other devices.
• Ultra-Low Power: As low as 10μA+ for human presence sensing and 10μA+ for 2.4G wireless connectivity.
• Superior Detection: 1T3R antenna array enables 3D sensing with rich zone perception and zone division; 2.5cm ultra-high range resolution for fine-grained micro-motion sensing (e.g., gestures, breathing/heart rate); 30m ultra-long detection range for large-space coverage.
• Simplified Development: 5-in-1 ultra-high integration (mmWave radar + multi-protocol wireless + PMU + SoC + AiP) with complete SDK and algorithm toolchain for one-stop sensor development, reducing product development cycles and costs.
• Motion/Micro-Motion/Presence detection
• Vital signs/Health monitoring
• Gesture recognition
• Video doorbell/IP Camera
• Air conditioner/Refrigerators
• PC/Notebooks/Tablets/Televisions
• Intelligent Lighting
• Wearable
• Smart Toilets/Urinals
• 8.8 x 5.8 x 0.68mm³
• FCCSP
| Name | Related | Version |
Date
|
|---|---|---|---|
|
+
RS6130_Product_Brief_EN.pdf
This document provides users with a brief technical specification of the RS6130 SoC.
|
|
V1.1
V1.1
|
2025/10/16
|
+
RS6130_Datasheet.pdf
This document provides users with a brief technical specification of the RS6130 SoC..
|
|
V1.6
V1.6
|
2025/10/16
|
| Name | Related | Version |
Date
|
|---|---|---|---|
|
+
RS6130_Product_Brief_EN.pdf
This document provides users with a brief technical specification of the RS6130 SoC.
|
|
V1.1
V1.1
|
2025/10/16
|
+
RS6130_Datasheet.pdf
This document provides users with a brief technical specification of the RS6130 SoC..
|
|
V1.6
V1.6
|
2025/10/16
|












